cystech electronics corp. spec. no. : c069j3 issued date : 2016.05.09 revised date : page no. : 1/ 9 MTD080P06J3 cystek product specification p-channel enhancement mode power mosfet MTD080P06J3 bv dss -60v i d @v gs =-10v, t c =25 c -12.5a r ds(on) @v gs =-10v, i d =-10a 84m (typ) r ds(on) @v gs =-5v, i d =-8a 113m (typ) features ? low gate charge ? simple drive requirement ? pb-free lead plating & halogen-free package equivalent circuit outline ordering information device package shipping MTD080P06J3-0-t3-g to-252 (pb-free lead plating & halogen-free package) 2500 pcs / tape & reel MTD080P06J3 to-252(dpak) g gate g d s d drain s source environment friendly grade : s for rohs compliant products, g for rohs compliant and green compound products packing spec, t3 : 2500 pcs / tape & reel, 13? reel product rank, zero for no rank products product name
cystech electronics corp. spec. no. : c069j3 issued date : 2016.05.09 revised date : page no. : 2/ 9 MTD080P06J3 cystek product specification absolute maximum ratings (t c =25c, unless otherwise noted) parameter symbol limits unit drain-source voltage v ds -60 gate-source voltage v gs 20 v continuous drain current @t c =25 c, v gs =-10v -12.5 continuous drain current @t c =100 c, v gs =-10v i d -7.9 continuous drain current @t a =25 c, v gs =-10v (note 2) -3.5 continuous drain current @t a =70 c, v gs =-10v (note 2) i dsm -2.8 pulsed drain current (note 3) i dm -45 avalanche current @l=0.1mh (note 3) i as -12.5 a avalanche energy @ l=1mh, i d =-10a, v dd =-50v (note 2) e as 50 mj t c =25 c (note 1) 31 t c =100 c (note 1) p d 12 t a =25 c (note 2) 2.5 total power dissipation t a =70 c (note 2) p dsm 1.6 w operating junction and storage temperature range tj, tstg -55~+150 c * 100% uis testing in condition of v d =-15v, l=1mh, v g =-10v, i as =-6a, rated v ds =-60v thermal data parameter symbol typical maximum unit thermal resistance, junction-to-case r jc 3.6 4 thermal resistance, junction-to-ambient, t 10s (note 2) 15 18 thermal resistance, junction-to-ambient, steady state r ja 40 50 c/w note : 1 . the power dissipation p d is based on t j(max) =150 c, using junction-to-case thermal resistance, and is more useful in setting the upper di ssipation limit for cases where additional heatsinking is used. 2 . the value of r ja is measured with the device mounted on 1 in 2 fr-4 board with 2 oz. copper, in a still air environment with t a =25 c. the power dissipation p dsm is based on r ja and the maximum allowed junction temperature of 150 c. the value in any given application depends on the user?s specific board design. 3 . pulse width limited by junction temperature t j(max) =150 c. ratings are based on low frequency and low duty cycles to keep initial t j =25 c.
cystech electronics corp. spec. no. : c069j3 issued date : 2016.05.09 revised date : page no. : 3/ 9 MTD080P06J3 cystek product specification characteristics (tc=25 c, unless otherwise specified) symbol min. typ. max. unit test conditions static bv dss -60 - - v gs =0v, i d =-250 a v gs(th) -1.5 - -3.5 v v ds =v gs , i d =-250 a i gss - - 100 na v gs = 20v, v ds =0v - - -1 v ds =-48v, v gs =0v i dss - - -25 a v ds =-48v, v gs =0v, t j =85 c - 84 110 v gs =-10v, i d =-10a r ds(on) *1 - 113 150 m v gs =-5v, i d =-8a g fs *1 - 11.5 - s v ds =-10v, i d =-10a dynamic qg *1, 2 - 11.9 17.9 qgs *1, 2 - 2.5 - qgd *1, 2 - 3.2 - nc i d =-10a, v ds =-48v, v gs =-10v t d(on) *1, 2 - 7.4 11 tr *1, 2 - 17.2 25.8 t d(off) *1, 2 - 22.8 34.2 t f *1, 2 - 7.4 11 ns v ds =-30v, i d =-10a, v gs =-10v, r g =3 ciss - 512 - coss - 53 - crss - 22 - pf v gs =0v, v ds =-25v, f=1mhz rg - 6.5 - f=1mhz source-drain diode ratings and characteristics i s *1 - - -12.5 i sm *1 - - -45 a v sd *1 - -0.97 -1.2 v i s =-10a, v gs =0v trr - 14 21 ns qrr - 10.4 - nc i f =-10a, di f /dt=100a/ s note : *1.pulse test : pulse width 300 s, duty cycle 2% *2.independent of operating temperature *3.pulse width limited by maximum junction temperature. recommended soldering footprint
cystech electronics corp. spec. no. : c069j3 issued date : 2016.05.09 revised date : page no. : 4/ 9 MTD080P06J3 cystek product specification typical characteristics typical output characteristics 0 2 4 6 8 10 12 14 16 18 20 024681 0 brekdown voltage vs ambient temperature 0.4 0.6 0.8 1.0 1.2 1.4 -75 -50 -25 0 25 50 75 100 125 150 175 tj, junction temperature(c) -bv dss , normalized drain-source breakdown voltage i d =-250 a, v gs =0v 10v,9v,8v,7v,6v -v ds , drain-source voltage(v) -i d , drain current(a) 5v 4v -v gs =3v 3.5v static drain-source on-state resistance vs drain current 0 100 200 300 400 500 0.01 0.1 1 10 100 -i d , drain current(a) r ds(on) , static drain-source on-state resistance(m) in descending order v gs = -5v -10v reverse drain current vs source-drain voltage 0.2 0.4 0.6 0.8 1.0 1.2 024681 -i dr , reverse drain current(a) -v sd , source-drain voltage(v) 0 tj=25c tj=150c v gs =0v static drain-source on-state resistance vs gate-source voltage 0 200 400 600 800 1000 024681 0 drain-source on-state resistance vs junction tempearture 0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 2.2 2.4 -75 -50 -25 0 25 50 75 100 125 150 175 tj, junction temperature(c) r ds(on) , normalized static drain- source on-state resistance v gs =-10v, i d =-10a r ds( on) @tj=25c : 82.5m typ. -v gs , gate-source voltage(v) r ds(on ), static drain-source on- state resistance(m) i d =-10a
cystech electronics corp. spec. no. : c069j3 issued date : 2016.05.09 revised date : page no. : 5/ 9 MTD080P06J3 cystek product specification typical characteristics (cont.) capacitance vs drain-to-source voltage 10 100 1000 0 1 02 03 0 threshold voltage vs junction tempearture 0.2 0.4 0.6 0.8 1.0 1.2 1.4 -75 -50 -25 0 25 50 75 100 125 150 175 tj, junction temperature(c) -v gs(th) , normalized threshold voltage i d =-250 a i d =-1ma ciss -v ds , drain-source voltage(v) capacitance---(pf) c oss f=1mhz crss maximum safe operating area 0.1 1 10 100 0.1 1 10 100 1000 -v ds , drain-source voltage(v) -i d , drain current (a) r ds( on) limited dc 10ms 100ms 1ms 100 s 1s t c =25c, tj=150c, v gs =-10v, r jc =4c/w, single pulse gate charge characteristics 0 2 4 6 8 10 03691215 qg, total gate charge(nc) -v gs , gate-source voltage(v) i d =-10a v d s =-48v maximum drain current vs case temperature 0 2 4 6 8 10 12 14 16 25 50 75 100 125 150 175 t c , case temperature(c) -i d , maximum drain current(a) v gs =-10v, tj(max)=150c, r jc =4c/w, single pulse typical transfer characteristics 0 2 4 6 8 10 12 14 16 18 20 012345678910 -v gs , gate-source voltage(v) -i d , drain current(a) v ds =-10v
cystech electronics corp. spec. no. : c069j3 issued date : 2016.05.09 revised date : page no. : 6/ 9 MTD080P06J3 cystek product specification typical characteristics (cont.) forward transfer admittance vs drain current 0.01 0.1 1 10 100 0.001 0.01 0.1 1 10 -i d , drain current(a) g fs , forward transfer admittance(s) v ds =-10v pulsed ta=25c single pulse power rating, junction to case 0 500 1000 1500 2000 2500 3000 0.0001 0.001 0.01 0.1 1 10 100 pulse width(s) power (w) t j(max) =150c t c =25c r jc =4c/w transient thermal response curves 0.001 0.01 0.1 1 1.e-04 1.e-03 1.e-02 1.e-01 1.e+00 1.e+01 1.e+02 1.e+03 t 1 , square wave pulse duration(s) r(t), normalized effective transient thermal resistance single pulse 0.01 0.02 0.05 0.1 0.2 d=0.5 1.r jc (t)=r(t)*r jc 2.duty factor, d=t 1 /t 2 3.t jm -t c =p dm *r jc (t) 4.r jc =4c/w
cystech electronics corp. spec. no. : c069j3 issued date : 2016.05.09 revised date : page no. : 7/ 9 MTD080P06J3 cystek product specification reel dimension carrier tape dimension
cystech electronics corp. spec. no. : c069j3 issued date : 2016.05.09 revised date : page no. : 8/ 9 MTD080P06J3 cystek product specification recommended wave soldering condition product peak temperature soldering time pb-free devices 260 +0/-5 c 5 +1/-1 seconds recommended temperature profile for ir reflow profile feature sn-pb eutectic assembly pb-free assembly average ramp-up rate (tsmax to tp) 3 c/second max. 3 c/second max. preheat ? temperature min(t s min) ? temperature max(t s max) ? time(ts min to ts max ) 100 c 150 c 60-120 seconds 150 c 200 c 60-180 seconds time maintained above: ? temperature (t l ) ? time (t l ) 183 c 60-150 seconds 217 c 60-150 seconds peak temperature(t p ) 240 +0/-5 c 260 +0/-5 c time within 5 c of actual peak temperature(tp) 10-30 seconds 20-40 seconds ramp down rate 6 c/second max. 6 c/second max. time 25 c to peak temperature 6 minutes max. 8 minutes max. note : all temperatures refer to topside of the package, measured on the package body surface.
cystech electronics corp. spec. no. : c069j3 issued date : 2016.05.09 revised date : page no. : 9/ 9 MTD080P06J3 cystek product specification to-252 dimension marking: device n am e date code d080 p06 1 2 3 4 style: pin 1.gate 2.drain 3.source 4.drain 3-lead to-252 plastic surface mount package cystek package code: j3 inches millimeters inches millimeters dim min. max. min. max. dim min. max. min. max. a 0.087 0.094 2.200 2.400 e 0.086 0.094 2.186 2.386 a1 0.000 0.005 0.000 0.127 e1 0.172 0.188 4.372 4.772 b 0.039 0.048 0.990 1.210 h 0.163 ref 4.140 ref b 0.026 0.034 0.660 0.860 k 0.190 ref 4.830 ref b1 0.026 0.034 0.660 0.860 l 0.386 0.409 9.800 10.400 c 0.018 0.023 0.460 0.580 l1 0.114 ref 2.900 ref c1 0.018 0.023 0.460 0.580 l2 0.055 0.067 1.400 1.700 d 0.256 0.264 6.500 6.700 l3 0.024 0.039 0.600 1.000 d1 0.201 0.215 5.100 5.460 p 0.026 ref 0.650 ref e 0.236 0.244 6.000 6.200 v 0.211 ref 5.350 ref notes: 1.controlling dimension: millimeters. 2.maximum lead thickness includes lead finish thickness, and minimum lead thickness is the minimum thickness of base material. 3.if there is any question with packing spec ification or packing method, please cont act your local cystek sales office. material: ? lead : pure tin plated. ? mold compound: epoxy resin family, flammability solid burning class: ul94v-0. important notice: ? all rights are reserved. reproduction in whole or in part is prohibited without the prior written approval of cystek. ? cystek reserves the right to make changes to its products without notice. ? cystek semiconductor products are not warranted to be suitab le for use in life-support applications, or systems. ? cystek assumes no liability for any consequence of customer pr oduct design, infringement of pat ents, or application assistance .
|
